• DocumentCode
    3701964
  • Title

    Performance of IC layout design diagnostic tool

  • Author

    K. S. Chari;Manoj Sharma

  • Author_Institution
    Department of Electronics, Poona University, Pune
  • fYear
    2015
  • fDate
    4/1/2015 12:00:00 AM
  • Firstpage
    332
  • Lastpage
    337
  • Abstract
    The staggering evolution of electronic products in all spheres of human life has been possible because of the advancements in the Integrated Circuit (IC) design and technologies. The complexities of the ICs have grown tremendously over the years, so does the intellectual capital of resources and man years of efforts in their creations. With increasing emphasis on protection of ICs, the issues of Intellectual Property Rights (IPR) pertaining to IC layout, the backbone of implemented functionality, have become crucial. The matters of IPR also touch on several legal and ethical issues associated with the layout creations. In this context, analyzing the distinctness in IC Layout Design (LD) and knowing the unique and common parts in different IC LDs of concern has become important both from IP protection aspects as well as design perspective of tagging the layouts for their content. A robust analytical evaluation of designs could immensely help in catching piracy of IC Designs in addition to assisting the screening processes followed before granting IPR to claimants. Authors have previously presented some results on custom designed IC Layout Design Diagnostic Tool (ICLDDT) for this purpose. In the present paper, the abilities of a more advanced version, Ver 2 of this tool is investigated further and results of performance reported.
  • Keywords
    "Geometry","Layout","Shape","Intellectual property","Complexity theory","Integrated circuit layout"
  • Publisher
    ieee
  • Conference_Titel
    Communication Technologies (GCCT), 2015 Global Conference on
  • Type

    conf

  • DOI
    10.1109/GCCT.2015.7342678
  • Filename
    7342678