Pixel-grain prediction and K-order UEG-rice entropy coding oriented lossless frame memory compression for motion estimation in HEVC

With the resolution of video sequences increasing, the memory bandwidth and space requirement has become one bottleneck of a video coding system. Most of previous frame memory compression works merely focused on reducing the averaged bandwidth demand. In this paper, a lossless frame memory compression algorithm for motion estimation in HEVC and the corresponding hardware architecture are described. The compression algorithm is composed of the 64×4 partition compression algorithm and the partition group table based storage scheme. Experimental results demonstrate that, on average, the proposed algorithm reduces 70.1% memory bandwidth and 41% memory space, while saving 59.0% dynamic energy. With TSMC 90nm CMOS logic technology, our algorithm were implemented in a parallel VLSI architecture of compressor and decompressor at the cost of 48.1K and 44.2K respectively in gate-count. The achieved peak throughput is 1.51Gpixel/s, which is sufficient to handle the SHV(8K)@30fps real-time encoding with the level-D reference data reuse scheme.