A novel 3D graphics DRAM architecture for high-performance and low-energy memory accesses

This paper presents a high-bandwidth 3D graphics DRAM architecture (3D-SGDRAM) with reduced access time and energy consumption. A novel 3D bank organization is employed with TSVs at subar-ray-level granularity to activate an optimal number of subarrays in lock-step to guarantee fast and low-energy memory access without significant area overhead. A new bitline interface enables access to only a selective group of bitlines in all active subarrays during a memory transaction, which greatly reduces row activation energy with optimal page size. Experimental results with CUDA benchmarks indicate that 3D-SGDRAM yields 57.5%, 77.7%, and 45.2% improvements in power, latency, and energy-delay product (EDP) on average over state-of-the-art GDDR5 and GDDR5M solutions.