• DocumentCode
    3718286
  • Title

    Advanced 3D eWLB-PoP (embedded Wafer Level Ball Grid Array - package on package) technology

  • Author

    Kang Chen;Jose Alvin Caparas;Linda Chua;Yaojian Lin;Seung Wook Yoon

  • Author_Institution
    STATS ChipPAC Ltd. 5 Yishun Street 23, Singapore 768442
  • fYear
    2015
  • Firstpage
    96
  • Lastpage
    100
  • Abstract
    The advancement of silicon scaling to 14/16 nanometer (nm) in support of higher performance, higher bandwidth and lower power consumption in portable and mobile devices is pushing the boundaries of emerging packaging technologies to smaller fan-out packaging designs with finer line/spacing as well as improved electrical performance and passive embedded technology capabilities. Advanced embedded Wafer Level Ball Grid Array (eWLB) technology provides a versatile platform for the semiconductor industry´s technology evolution from single or multi-die 2D package designs to 2.5D interposers and 3D System-in-Package (SiP) configurations.
  • Keywords
    "Three-dimensional displays","Reliability","Manufacturing","Silicon","Packaging","Vehicles","Surface treatment"
  • Publisher
    ieee
  • Conference_Titel
    Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), 2015 10th International
  • Print_ISBN
    978-1-4673-9690-5
  • Type

    conf

  • DOI
    10.1109/IMPACT.2015.7365174
  • Filename
    7365174