• DocumentCode
    3718523
  • Title

    Design and SEE Testing of High Density High Speed Radhard Synchronous SRAM

  • Author

    Vasily S. Anashin;Pavel A. Chubunov;Grigory A. Protopopov;Sergey A. Iakovlev;Aleksey V. Perebeynos;Aleksander V. Rutkevich;Dmitriy I. Voronkov;Yaroslav S. Gubin;Boris A. Novikov;Dmitriy A. Skaryukin;Aleksandra S. Popova

  • Author_Institution
    Design Center Digital Solutions SPE, LLC, Moscow, Russia
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    6T SRAM bitcells for high density 64MB SRAM has been designed. Test chip with memory arrays based on these bitcells was manufactured and characterized for radiation effects. The device is SEL immune, has an error rate less than 4·E-18 errors/bit·day.
  • Keywords
    "Random access memory","Error correction codes","Orbits","Testing","Silicon","Single event upsets"
  • Publisher
    ieee
  • Conference_Titel
    Radiation and Its Effects on Components and Systems (RADECS), 2015 15th European Conference on
  • Print_ISBN
    978-1-5090-0232-0
  • Type

    conf

  • DOI
    10.1109/RADECS.2015.7365598
  • Filename
    7365598
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3718523