Hardware implementation of ultralightweight cryptographic protocols

RFID (Radio Frequency Identification) is among the most emerging and tremendously growing technologies in the field of automatic identification. The technology is far better than its other contending systems such as Barcodes and magnetic tapes as it provides optimal communication link with non line of sight capability. Several researchers have proposed various ultralightweight RFID authentication protocols to provide cost effective security solutions. However, the proper hardware implementation of these ultralightweight authentication protocols has been neglected long which develops a chaos of their practical feasibility. In this paper, we have addressed this problem and proposed generic hardware architecture for EPC-C1G2 tags. We have also simulated four ultralightweight authentication protocols (SASI, LMAP, David-Prasad and RAPP) using ModelSim PE and synthesized using Xilinx Design Suite 14.5. Algorithm has been successfully implemented in hardware using Spartan 6 (Low Power) and Vertex 7 Field Programmable Gate Array (FPGA). We believe that the proposed architecture and simulated results will act as the stepping stone for the future implementation of these low cost RFID tags for ASIC.