Co-design of 3D wireless network-on-chip architectures with microchannel-based cooling

Three-dimensional Integrated Circuits (3D ICs) provide promising solutions to the challenges of footprint, device density and energy cost of on-chip communication. However, the increase in power density in 3D ICs due to reduced footprint aggravates the thermal issues in the chip. Liquid cooling through microfluidic channels can provide cooling capacities required for effective management of chip temperatures in 3D ICs. However, pumping liquid through the microchannels can cause high pressure drops causing structural instability in the chip. In order to reduce the pressure drops the height of the microchannels needs to be increased. This in turn makes the vertical interconnects realized by Through-Silicon-Vias longer, increasing delay and power consumption in data transfer. In this paper we propose to realize the vertical interconnects across the cooling layers with on-chip wireless interconnects. We present energy-efficient wireless 3D NoC architectures with optimal dimensions of microchannels for best thermal cooling capability and pressure characteristics.