DocumentCode
3745651
Title
Research on L3 Cache Timing Attack against DSA Adopting Square-and-Multiply Algorithm
Author
Zhou Ping;Wang Tao;Chen Hao
Author_Institution
Dept. of Inf. Eng., Ordnance Eng. Coll., Shijiazhuang, China
fYear
2015
Firstpage
1390
Lastpage
1393
Abstract
L3 Cache timing attack is recently proposed as a new type of Cache timing attacks. In this paper we implement this new ideal on the DSA and demonstrate that the DSA is also vulnerable to L3 Cache attack. We propose a method to break the DSA by spying on the exponentiation step and recover the nonce. We also propose an operations recovery algorithm for recovering the sequence of operations performed during signing. Experiments are conducted and the results show that the success rate of full nonce recovery is 63%.
Keywords
"Monitoring","Timing","Software algorithms","Computers","Public key cryptography"
Publisher
ieee
Conference_Titel
Instrumentation and Measurement, Computer, Communication and Control (IMCCC), 2015 Fifth International Conference on
Type
conf
DOI
10.1109/IMCCC.2015.297
Filename
7406076
Link To Document