DocumentCode
375066
Title
CMOS implementation of the IDEA encryption algorithm
Author
Qin, Yong ; Oh, Jong C. ; Kim, Bruce
Author_Institution
Dept. of Electr. & Comput. Eng., Michigan State Univ., East Lansing, MI, USA
Volume
1
fYear
2000
fDate
2000
Firstpage
272
Abstract
Describes the VLSI implementation of IDEA cryptochip using 0.25 μm CMOS technology. With a new implementation of multiplication of modulo 24 + 1 (17), we achieved a high-throughput encryption and decryption. We present the functional verification and performance data using the IRSIM and HSPICE simulations
Keywords
CMOS digital integrated circuits; SPICE; VLSI; circuit simulation; cryptography; digital signal processing chips; integrated circuit modelling; 0.25 micron; CMOS; HSPICE simulations; IDEA encryption algorithm; IRSIM simulations; VLSI; functional verification; high-throughput decryption; high-throughput encryption; multiplication; Algorithm design and analysis; Authentication; CMOS technology; Cryptography; Hardware; Paper technology; Privacy; Proposals; Throughput; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on
Conference_Location
Lansing, MI
Print_ISBN
0-7803-6475-9
Type
conf
DOI
10.1109/MWSCAS.2000.951641
Filename
951641
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