• DocumentCode
    3763779
  • Title

    Novel high-speed dynamic differential ultra low voltage logic for supply-voltage below 300 mV

  • Author

    O. Mirmotahari;A. Dadashi;M. Azadmehr;Y. Berg

  • Author_Institution
    Nanoelectronics System Group, Department of Informatics, University of Oslo, Norway
  • fYear
    2015
  • Firstpage
    53
  • Lastpage
    56
  • Abstract
    In this paper we propose a differential dynamic dual rail CMOS logic style for ultra-low-voltage and high-speed operation. For a supply voltage equal to 300mV using a 90nm TSMC CMOS process the delay of the proposed logic style is reduced more than 96% compared to the delay of dual rail clocked voltage switch logic.
  • Keywords
    "Inverters","Delays","Transistors","Logic gates","Low voltage","Clocks"
  • Publisher
    ieee
  • Conference_Titel
    Electronics, Circuits, and Systems (ICECS), 2015 IEEE International Conference on
  • Type

    conf

  • DOI
    10.1109/ICECS.2015.7440247
  • Filename
    7440247
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3763779