Deadlock detection in conditional asynchronous circuits under mismatched branch selection

In this paper we introduce an algorithm that detects the deadlock in conditional asynchronous circuits when the selection controls are not matched. By knowing the slack in each branch and the detailed selection pattern for each Split and Merge, the algorithm detects the deadlock, specifies the branch at which the deadlock occurs, and determines how much slack is needed to free the deadlock. The proposed algorithm is implemented and tested against Verilog simulation.