• DocumentCode
    3764957
  • Title

    Modeling of trapping effects in GaN HEMTs

  • Author

    Shantanu Agnihotri;Sudip Ghosh;Avirup Dasgupta;Sheikh Aamir Ahsan;Sourabh Khandelwal;Yogesh Singh Chauhan

  • Author_Institution
    Nanolab, Department of Electrical Engineering, Indian Institute of Technology Kanpur, India
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    In this work, we study the trapping in GaN power HEMTs and discuss effect of traps on device characteristics. Simulation setups for analysis of switching collapse and current collapse observed in pulsed I-V are also presented. We propose an RC network based trap model to capture the effect of trapping in a surface potential based compact model for GaN HEMTs. The proposed model has been verified with the hardware data for various quiescent biases and frequencies, and the model results are in excellent agreement with the hardware data.
  • Keywords
    "HEMTs","MODFETs","Stress","Logic gates","Charge carrier processes","Data models","Switches"
  • Publisher
    ieee
  • Conference_Titel
    India Conference (INDICON), 2015 Annual IEEE
  • Electronic_ISBN
    2325-9418
  • Type

    conf

  • DOI
    10.1109/INDICON.2015.7443658
  • Filename
    7443658