DocumentCode
3777242
Title
MScache: A buffer management scheme based on page-level address mapping for NAND-flash SSD
Author
Gao Zhong-yi; Pan Li-yang; Ma Hao-zhi; Liang Feng-bo
Author_Institution
Institute of Microelectronics, Tsinghua University, Beijing 100084, China
Volume
1
fYear
2015
Firstpage
163
Lastpage
168
Abstract
NAND Flash has been widely used in consumer electronic devices, especially in SSDs (Solid State Disks). However, with the process scaling down, its inherent imperfection will be more severe, such as the limited endurance, asymmetric speed of programming and read. While a traditional cache mechanism can improve the performance partly, it can´t reduce the unnecessary writes to NAND Flash resulting from read miss; besides, it is still difficult for most current cache strategies to respond diverse patterns of access rapidly. In this paper, a novel Master and Slave Cache (MScache) based on page-level mapping and hybrid buffer management strategy is proposed to reduce the redundant writes to NAND Flash, improve access speed and prolong SSD´s lifespan. We assess the scheme with three typical traces and three classical cache schemes are compared. The simulation results show that the proposed MScache can achieve dramatically writes and erases reduction.
Keywords
"Flash memories","Random access memory","Resource management","Programming","Writing","Degradation","Performance evaluation"
Publisher
ieee
Conference_Titel
Computer Science and Network Technology (ICCSNT), 2015 4th International Conference on
Type
conf
DOI
10.1109/ICCSNT.2015.7490729
Filename
7490729
Link To Document