An automatic translation and parallelization system for general purpose reconfigurable processor

With ever increasing processing elements being integrated on a single reconfigurable SoC, significant programming challenge for effective use of them has been raised. One attractive approach is doing automatic translation and parallelization for specific reconfigurable processors to ease the programming work. In this paper, we describe an automatic translation and parallelization system, which uses polyhedral model for parallelization and code generation, for the general purpose reconfigurable processor (GReP). With some simple tags added in legal C program, we can easily translate it into parallel GR-C program and get good optimization of the nested loops. Experiments show that our system can get similar performance with optimized manual configuration, about 5 times speedup compared to serial execution.