Implementation of IDFT algorithm

We demonstrate the feasibility of exploiting FPGA devices for implementation of a computing-intensive algorithm for edge detection which is one of the earliest steps in image processing. We have developed a modular FPGA-based prototyping system composed of five Xilinx Spartan FPGA devices. The purpose of the system is to evaluate various image processing algorithms implemented in hardware. We have already implemented the edge detection algorithm on the basis of the inverse discrete Fourier transform (IDFT). We have first performed a discrete Fourier transform (DFT) on the input images, multiplying the samples with high-pass filter followed by the IDFT to obtain the image with detected edges. The whole algorithm is performed in a real-time. We have compared the efficiency of the algorithm versus the software implementation on the PC.