DocumentCode
378864
Title
An embedded 0.8 V/480 /spl mu/W 6b/22 MHz flash ADC in 0.13 /spl mu/m digital CMOS process using nonlinear double-interpolation technique
Author
Lin, J. ; Haroun, B.
Author_Institution
Texas Instrum. Inc., Dallas, TX, USA
Volume
1
fYear
2002
fDate
7-7 Feb. 2002
Firstpage
308
Abstract
For high-data-rate wireless communication, a 0.8 V 480 /spl mu/W 6b 22 MSample/s flash-interpolation ADC is fabricated in 0.13 /spl mu/m digital CMOS. The circuit achieves 33 dB SNDR and 47 dB SFDR using a nonlinear double-interpolation technique.
Keywords
CMOS integrated circuits; analogue-digital conversion; interpolation; 0.13 micron; 0.8 V; 22 MHz; 480 muW; 6 bit; SFDR; SNDR; digital CMOS process; embedded flash ADC; nonlinear double interpolation technique; wireless communication; CMOS process; Circuits; Clocks; Delta-sigma modulation; Dynamic range; High power amplifiers; Interpolation; Latches; Resistors; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-7803-7335-9
Type
conf
DOI
10.1109/ISSCC.2002.993055
Filename
993055
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