DocumentCode
3799184
Title
Prolog to Substrate Noise Coupling in SoC Design: Modeling, Avoidance, and Validation
Author
Howard Falk
Volume
94
Issue
12
fYear
2006
Firstpage
2107
Lastpage
2108
Keywords
"Circuit noise","Crosstalk","Noise reduction","Coupling circuits","Power supplies","Integrated circuit noise","Packaging","System-on-a-chip","Circuit simulation","Voltage"
Journal_Title
Proceedings of the IEEE
Publisher
ieee
ISSN
0018-9219
Type
jour
DOI
10.1109/JPROC.2006.886024
Filename
4077258
Link To Document