DocumentCode
3848621
Title
The Velox Transactional Memory Stack
Author
Yehuda Afek;Ulrich Drepper;Pascal Felber;Christof Fetzer;Vincent Gramoli;Michael Hohmuth;Etienne Riviere;Per Stenstrom;Osman Unsal;Walther Maldonado Moreira;Derin Harmanci;Patrick Marlier;Stephan Diestelhorst;Martin Pohlack;Adrian Cristal;Ibrahim Hur;Alek
Author_Institution
Tel Aviv University
Volume
30
Issue
5
fYear
2010
Firstpage
76
Lastpage
87
Abstract
The adoption of multi- and many-core architectures for mainstream computing undoubtedly brings profound changes in the way software is developed. In particular, the use of fine grained locking as the multi-core programmer´s coordination methodology is considered by more and more experts as a dead-end. The transactional memory (TM) programming paradigm is a strong contender to become the approach of choice for replacing locks and implementing atomic operations in concurrent programming. Combining sequences of concurrent operations into atomic transactions allows a great reduction in the complexity of both programming and verification, by making parts of the code appear to execute sequentially without the need to program using fine-grained locking. Transactions remove from the programmer the burden of figuring out the interaction among concurrent operations that happen to conflict when accessing the same locations in memory. The EU-funded FP7 VELOX project designs, implements and evaluates an integrated TM stack, spanning from programming language to the hardware support, and including runtime and libraries, compilers, and application environments. This paper presents an overview of the VELOX TM stack and its associated challenges and contributions.
Keywords
"Libraries","Runtime","Hardware","Java","Programming","Program processors"
Journal_Title
IEEE Micro
Publisher
ieee
ISSN
0272-1732
Type
jour
DOI
10.1109/MM.2010.80
Filename
5567088
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