• DocumentCode
    385917
  • Title

    Best polarity for low power XOR gate decomposition

  • Author

    Xia, Yinshui ; Almaini, A.E.A.

  • Author_Institution
    Sch. of Eng., Napier Univ., Edinburgh, UK
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    53
  • Lastpage
    59
  • Abstract
    In this paper, polarity transform is introduced to identify low power XOR gate decompositions. It is pointed out that the previous solutions for XOR gate decomposition are not optimal. Based on searching best polarity for low power dissipation, a new algorithm is proposed and implemented in C. The experimental results show improved switching activities compared with previous publications.
  • Keywords
    logic design; logic gates; best polarity; low power XOR gate decomposition; polarity transform; switching activities; Algorithm design and analysis; CMOS technology; Capacitance; Circuit testing; Field programmable gate arrays; Logic; Power dissipation; Power engineering and energy; Terminology; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Digital System Design, 2002. Proceedings. Euromicro Symposium on
  • Print_ISBN
    0-7695-1790-0
  • Type

    conf

  • DOI
    10.1109/DSD.2002.1115351
  • Filename
    1115351
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=385917