DocumentCode
387983
Title
A WE-DSP32 based, low-cost, high-performance, synchronous multiprocessor for cyclo-static implementations
Author
McGrath, S. J A ; Barnwell, T.P., III ; Schwartz, D.A.
Author_Institution
Georgia Institute of Technology, Atlanta, Georgia
Volume
12
fYear
1987
fDate
31868
Firstpage
1899
Lastpage
1902
Abstract
This paper describes a synchronous multiprocessor system based on the AT&T WE-DSP32 floating-point digital signal processor chip. This system has been specifically designed so that it can support cyclo-static realizations, and will be programmed using existing cyclo-static compilers. This paper discusses the improvements in device architecture which would be required if fully optimal cyclo-static realizations were to be possible.
Keywords
Delay; Digital signal processing; Digital signal processing chips; Digital signal processors; Flow graphs; Laboratories; Multiprocessing systems; Program processors; Signal generators; Signal processing algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '87.
Type
conf
DOI
10.1109/ICASSP.1987.1169340
Filename
1169340
Link To Document