• DocumentCode
    395532
  • Title

    Hardware neuron models with CMOS for auditory neural networks

  • Author

    Saeki, Katsutoshi ; Iidaka, Ryusuke ; Sekine, Yoshifumi ; Aihara, Kazuyuki

  • Author_Institution
    Dept. of Electron. Eng., Nihon Univ., Chiba, Japan
  • Volume
    3
  • fYear
    2002
  • fDate
    18-22 Nov. 2002
  • Firstpage
    1325
  • Abstract
    A number of studies have recently been made on hardware implementation of a neuron model for applications to information processing functions of neural networks. We previously proposed the transfer function which changes the threshold of a pulse-type hardware neuron model (hereafter, "P-HNM") in time according to an output that express feature-detecting cell and a universal-type hardware neuron model using depletion mode MOSFETs (hereafter "D-MOSFETs"), resistors, and capacitors. However, because it is difficult to make D-MOSFETs due to a complicated manufacturing process, they are not usually used in IC implementation. In this paper, we propose hardware neuron models with CMOS for feature-detecting cells of auditory neural network.
  • Keywords
    CMOS integrated circuits; hearing; neural chips; neural nets; neurophysiology; physiological models; auditory neural network; depletion mode MOSFET; feature-detection; hardware neuron models; transfer function; Capacitors; Information processing; MOSFETs; Manufacturing processes; Neural network hardware; Neural networks; Neurons; Resistors; Semiconductor device modeling; Transfer functions;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Neural Information Processing, 2002. ICONIP '02. Proceedings of the 9th International Conference on
  • Print_ISBN
    981-04-7524-1
  • Type

    conf

  • DOI
    10.1109/ICONIP.2002.1202836
  • Filename
    1202836