DocumentCode
396558
Title
Design of soft-output Viterbi decoders with hybrid trace-back processing
Author
Chang, Yun-Nan
Author_Institution
Dept. of Comput. Sci. & Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
Volume
2
fYear
2003
fDate
25-28 May 2003
Abstract
This paper presents a novel VLSI architecture for soft output Viterbi algorithm (SOVA) based on hybrid track-back of transverse paths. In order to achieve very high speed of decoding, majority of SOVA designs in the past use simple register-exchange method that nevertheless suffers from both complex routing and high switching activities. In this paper, a hybrid approach that combines both the trace-back and register exchange schemes has been applied to the design of SOVA. The resulted architecture not only exhibits better regularity due to less routing, but it can also lead to lower power consumption because of reduced switching activities.
Keywords
VLSI; Viterbi decoding; SOVA design; VLSI architecture; hybrid trace-back processing; power consumption; register exchange; soft-output Viterbi decoder; switching activity; Communication switching; Computer architecture; Computer science; Decoding; Digital communication; Energy consumption; Error correction; Routing; Very large scale integration; Viterbi algorithm;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN
0-7803-7761-3
Type
conf
DOI
10.1109/ISCAS.2003.1205890
Filename
1205890
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