• DocumentCode
    400723
  • Title

    Characterization and modeling of bonded hydrophobic interfaces for high-power BIMOS-devices

  • Author

    Detjen, Dirk ; Plum, Thomas ; Schröder, Stefan ; De Doncker, Rik W.

  • Author_Institution
    Inst. for Power Electron. & Electr. Drives, Aachen Univ., Germany
  • Volume
    2
  • fYear
    2003
  • fDate
    12-16 Oct. 2003
  • Firstpage
    1236
  • Abstract
    In this paper, a detailed investigation regarding the suitability of silicon-silicon wafer bonding to realize novel high-power thyristor-type devices is presented. The electrical characteristics of the bonding interface are examined both theoretically and experimentally. Moreover, a physical model of the grain boundary in silicon is illustrated and the current flow mechanisms at the potential barrier are explained for unipolar as well as bipolar carrier transport. For bipolar current transport, the relation between minority carrier excess at the bonding interface and the modification of the potential barrier is analytically derived. The different current components at the grain boundary due to thermal emission and carrier recombination are determined. Based on this calculation, a negligible impact of the grain boundary under bipolar current condition, which has been already observed in finite element simulations, is predicted. Finally, experimental results for bonded psn-diode structures are presented further supporting the rapidly decreasing potential barrier at the bonding interface in conductivity modulated devices.
  • Keywords
    MOS-controlled thyristors; electrical conductivity; finite element analysis; grain boundaries; minority carriers; power semiconductor diodes; semiconductor device models; thyristor applications; wafer bonding; MOS-turn-off thyristor; bipolar carrier transport; bonded hydrophobic interfaces; bonded psn-diode structures; bonding interface; carrier recombination; conductivity modulated devices; current flow mechanisms; electrical characteristics; finite element simulations; grain boundary; high-power BIMOS-devices; high-power thyristor-type devices; minority carrier excess; potential barrier; silicon-silicon wafer bonding; thermal emission; Conductivity; Grain boundaries; Insulated gate bipolar transistors; MOSFET circuits; Power electronics; Semiconductor device modeling; Silicon; Thyristors; Voltage; Wafer bonding;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Industry Applications Conference, 2003. 38th IAS Annual Meeting. Conference Record of the
  • Print_ISBN
    0-7803-7883-0
  • Type

    conf

  • DOI
    10.1109/IAS.2003.1257708
  • Filename
    1257708