Multi-layer realization of symmetrical differential inductors for RF silicon IC´s

The performance of multi-layer differential inductors is compared with that achievable by single-layer ones, referring in particular to silicon technology. It is demonstrated that through a proper sequence of strips on metal layers, a saving of chip area and a notable increase in self-resonance frequency can be obtained, with only a limited reduction of the quality factor in comparison with a single layer structure of equal inductance. The solution is mainly interesting for applications like choke inductors in VCOs, which require compact inductors of high values of inductance and tolerate moderate quality factors.