• DocumentCode
    403902
  • Title

    Using logic models to predict the detection behavior of statistical timing defects

  • Author

    Wang, L.-C. ; Krstic, A. ; Lee, Lun-Hui ; Kwang-Ting Cheng

  • Author_Institution
    Synopsys, Inc.
  • Volume
    1
  • fYear
    2003
  • fDate
    Sept. 30-Oct. 2, 2003
  • Firstpage
    1041
  • Lastpage
    1050
  • Keywords
    Circuit faults; Circuit noise; Circuit simulation; Delay effects; Electrical fault detection; Fault detection; Logic testing; Manufacturing processes; Predictive models; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 2003. Proceedings. ITC 2003. International
  • ISSN
    1089-3539
  • Print_ISBN
    0-7803-8106-8
  • Type

    conf

  • DOI
    10.1109/TEST.2003.1271092
  • Filename
    1271092