A novel low-power readout structure for TDI ROIC

Author

Lu Wengao ; Gao Jun ; Chen Zhongjian ; Liu Jing ; Cui Wentao ; Tang Ju ; Ji Lijiu

Author_Institution

Inst. of Microelectron., Peking Univ., Beijing, China

Volume

1

fYear

2003

fDate

21-24 Oct. 2003

Firstpage

591

Abstract

A novel readout structure called Forward-Backward-Asynchronous-Reset (FBAR) structure is presented in this paper. This readout structure is used in high performance CMOS readout integrated circuits (ROIC). Using asynchronous reset structure can increase the column OPA´s smallest settling time without decreasing frame´s readout frequency. By increasing smallest settling time, a low-power column OPA with power dissipation=78 μW can satisfy fast readout speed. While in typical synchronous reset structure, the column OPA´s power dissipation may exceed 200 μW to meet readout speed. This improvement can save more than 50% power dissipation of the column readout stage. An experiment ROIC chip using FBAR structure has been fabricated with 1.2 μm DPDM n-well CMOS technology. Testing result shows the total active chip power dissipation is 25 mW.

Keywords

CMOS integrated circuits; integrated circuit design; low-power electronics; optical parametric amplifiers; readout electronics; CMOS readout integrated circuits; DPDM n-well CMOS technology; FBAR structure; OPAs power dissipation; ROIC chip; TDI ROIC; asynchronous reset structure; complementary metal oxide semiconductor; double poly double metal n-well CMOS technology; forward backward asynchronous reset structure; frames readout frequency; low power readout structure; optical parametric amplifiers; readout speed; settling time; time delay integration;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC, 2003. Proceedings. 5th International Conference on

ISSN

1523-553X

Print_ISBN

0-7803-7889-X

Type

conf

DOI

10.1109/ICASIC.2003.1277618

Filename

1277618