Embedding fault tolerance via reconfiguration in configurable systems

This paper presents a new approach to on-line fault tolerance via reconfiguration for the systems mapped onto field programmable gate arrays (FPGAs). The fault detection, based on self-checking technique, is introduced at application level, therefore our approach can detect the faults in the FPGAs concurrently with the normal system work. A grid of tiles is projected on the FPGA structure and a certain number of spare configurable logic blocks (CLBs) is reserved inside every tile. Unlike fixed structure fault-tolerance techniques for ASICs and microprocessors. this approach allows a single physical component to provide redundant backup for several types of components. The reliability gain of the proposed solution was evaluated using basic reliability parameter, whose values were computed for different alternatives of the solution.