VLSI circuit design using an object-oriented framework of evolutionary graph generation system

Author

Homma, Naofumi ; Natsui, Masanori ; Aoki, Takafumi ; Higuchi, Tatsuo

Author_Institution

Graduate Sch. of Inf. Sci., Tohoku Univ., Sendai, Japan

Volume

1

fYear

2003

fDate

8-12 Dec. 2003

Firstpage

115

Abstract

This paper presents a generic objected-oriented framework of evolutionary graph generation (EGG) for automated circuit synthesis. The EGG system can be systematically implemented for different design problems by inheriting the framework class templates. The potential capability of EGG framework is demonstrated through experimental synthesis of both digital and analogue circuits. Design examples discussed in this paper are: (i) bit-serial multipliers using bit-level arithmetic components; and (ii) current mirrors using transistor-level components.

Keywords

VLSI; circuit CAD; current mirrors; evolutionary computation; integrated circuit design; multiplying circuits; object-oriented methods; VLSI circuit design; analogue circuits; automated circuit synthesis; bit-level arithmetic components; bit-serial multipliers; current mirrors; digital circuits; evolutionary graph generation system; framework class templates; objected-oriented framework; transistor-level components; Analog circuits; Arithmetic; Circuit synthesis; Electronic design automation and methodology; Genetic programming; Hardware; Integrated circuit synthesis; Integrated circuit technology; Mirrors; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Evolutionary Computation, 2003. CEC '03. The 2003 Congress on

Print_ISBN

0-7803-7804-0

Type

conf

DOI

10.1109/CEC.2003.1299564

Filename

1299564