Behavioral modelling of RF filters in VHDL-AMS for automated architectural and parametric optimization

This contribution presents a methodology, based on VHDL-AMS modelling, for architectural and parametric optimization of high-frequency analogue filters, used in the process of automated synthesis. The synthesis methodology has been designed around the usage of VHDL-AMS parse trees as an intermediate system representation. Behavioral description of filters combines the familiar mathematical/numerical expressions which contain the vital design parameters of an analogue filter such as the quality factor and frequency range. The user specification is processed by the filter synthesis tool named FIST which produces a selection of analogue filter circuits that are suitable for integrated high-frequency applications.