Modeling and designing high performance analog reconfigurable circuits

The theoretical model for a mixed signal front-end interface for the SOC employing a fixed analog cell is presented in this work. The set of developed equations can be used for high level design space exploration. Moreover, the proposed architecture leads to programmable analog processing functions using digital modules, well suited to current FPGAs platforms and general purpose SOC. Some guidelines are addressed on how the proposed architecture can lead to greater level of analog design automation. Experimental results show constant performance over a large frequency range of the input signal, and validate the proposed design equations.