DocumentCode
430128
Title
Characterization and hardware correlation of multi-gigahertz parallel bus with transmit pre-emphasis equalization
Author
Beyene, Wendmagegnehu T. ; TORRES, ABEL ; Cheng, Newton ; Vaidyanath, Artun ; Kizer, Jade ; Nguyen, Huey ; Yuan, Chuck
Author_Institution
Rambus Inc., Los Altos, CA, USA
fYear
2004
fDate
25-27 Oct. 2004
Firstpage
177
Lastpage
180
Abstract
This work describes the characterization and hardware correlation of an equalized parallel bus for multi-gigahertz data-rate operation. In contrast to our earlier paper where interconnect design, modeling, and equalization of band-limited channels were discussed, This work focuses on characterization and correlation methodologies of complete passive and active chip-to-chip communication systems. The simulation and measurement results of equalized channels are correlated in both time and frequency domains. The performance of equalized channels is also verified by comparing the measured and simulated eye diagrams for various values of equalization coefficients up to 8 GHz data rates.
Keywords
correlation methods; electronics packaging; equalisers; frequency-domain analysis; interconnections; system buses; time-domain analysis; 8 GHz; band limited channels; chip-to-chip communication systems; electronics packaging; equalization coefficients; frequency domains; hardware correlation method; multigigahertz data rate operation; multigigahertz parallel bus; parallel bus equalization; simulated eye diagrams; time domain; Attenuation; Dielectric losses; Frequency domain analysis; Hardware; Hip; Integrated circuit interconnections; Packaging; Predictive models; Semiconductor device measurement; Time measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Performance of Electronic Packaging, 2004. IEEE 13th Topical Meeting on
Print_ISBN
0-7803-8667-1
Type
conf
DOI
10.1109/EPEP.2004.1407578
Filename
1407578
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