Moment computations for R(L)C interconnects with multiple resistor loops using ROBDD techniques

Author

Lee, Hemg-Jer ; Lai, Ming-Hong ; Chu, Chia-Chi ; Feng, Wu-Shiung

Author_Institution

Dept. of Electr. Eng., Chang Gung Univ.

Volume

1

fYear

2004

fDate

6-9 Dec. 2004

Firstpage

525

Abstract

A new moment computation technique for general lumped R(L)C interconnect circuits with multiple resistor loops is proposed. Using the concept of tearing, a lumped R(L)C network can be partitioned into a spanning tree and several resistor links. The contributions of network moments from each tree and the corresponding links can be determined independently. By combining the conventional moment computation algorithms and the reduced ordered binary decision diagram (ROBDD), the proposed method can compute system moments efficiently

Keywords

RLC circuits; binary decision diagrams; circuit simulation; integrated circuit interconnections; integrated circuit modelling; R(L)C interconnects; ROBDD techniques; lumped R(L)C network; moment computations; multiple resistor loops; network moments; reduced ordered binary decision diagram; resistor links; spanning tree; Boolean functions; Computational efficiency; Computer networks; Data structures; Dielectric losses; Integrated circuit interconnections; Power system interconnection; Power system modeling; Resistors; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2004. Proceedings. The 2004 IEEE Asia-Pacific Conference on

Conference_Location

Tainan

Print_ISBN

0-7803-8660-4

Type

conf

DOI

10.1109/APCCAS.2004.1412814

Filename

1412814