A high-efficiency back-bias generator with cross-coupled hybrid pumping circuit for sub-1.5 V DRAM applications

Based on the study about the previously developed back-bias generators, a new high-efficiency back-bias generator with the Cross-coupled Hybrid Pumping Circuit 2 (CHPC2) is presented in this paper. CHPC2 takes only the advantages from the previous ones, throwing away the disadvantages. CHPC2 shows |VBB|/VCCas large as 98% even at low VCC=0.9 V, strongly addressing that it will be suitable at low voltage DRAM applications. Moreover, CHPC2 exhibits much better pumping efficiency and larger pumping current over the previous ones with wide RLrange at VCC=1.2 V.