A fully integrated 2.4GHz LC-VCO frequency synthesizer with 3ps jitter in 0.18 µm standard digital CMOS copper technology

A fully integrated low jitter frequency synthesizer with a 2.4GHz LC-VCO PLL realized in a standard digital O. 18um CMOS copper technology with 1.8V supply is presented. The system is designed to provide various output clock signals for a transceiver chip. Sampling clocks for on-chip ADC and DAC modules are also generated, therefore low jitter is required. The system also includes an additional digital PLL and programmable fractional dividers. We present the general concept, special issues related to low jitter, and finally testchip results. We show the effects of two different PLL bandwidths on timing jitter. The synthesizer achieves 3ps RMS long-term jitter on a 200MHz output with 20mW power and an area of 0.7mm².