DocumentCode
439962
Title
Silicon gate complementary MOS structure with field shield
Author
Lin, H.C. ; Hayes, Patrick J
Volume
17
fYear
1971
fDate
1971
Firstpage
26
Lastpage
26
Abstract
Conventional aluminum gate complementary MOS transistor structures normally have the p-channel transistor fabricated in a low concentration (
impurity atoms/cm3) (1,0,0) oriented silicon substrate and the n-channel transistor fabricated in an isolated p-type "well" with a surface concentration on the order of 1016impurity atoms/cm3diffused into the n-type substrate. If silicon gate technology is to be implemented for CMOS structures of similar background concentrations with a p-doped gate used for the p-channel transistors and an n-doped gate used for the n-channel transistors, the p-channel devices tend to be in depletion mode which is undesirable for switching circuits.
impurity atoms/cm3) (1,0,0) oriented silicon substrate and the n-channel transistor fabricated in an isolated p-type "well" with a surface concentration on the order of 1016impurity atoms/cm3diffused into the n-type substrate. If silicon gate technology is to be implemented for CMOS structures of similar background concentrations with a p-doped gate used for the p-channel transistors and an n-doped gate used for the n-channel transistors, the p-channel devices tend to be in depletion mode which is undesirable for switching circuits.Keywords
Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1971 International
Conference_Location
IEEE
Type
conf
Filename
1476694
Link To Document