A test bench for full characterization of the DIALOG chip

Author

Cadeddu, Sandro ; De Leo, Vincenzo ; Deplano, Caterina ; Fellow, A.L.

Author_Institution

Ist. Nazionale di Fisica Nucl., Cagliari

Volume

2

fYear

2005

fDate

23-29 Oct. 2005

Firstpage

665

Lastpage

669

Abstract

We present a semi-automatic test system designed for the complete characterization of the DIALOG integrated circuit. The DTS (DIALOG test system) checks all the circuit functionalities. It measures the DIALOG output channels programmable time delay and width with 72 ps time resolution. DIALOG threshold voltage outputs are measured with a resolution of 0.6 mV. The complete characterization of one chip takes about 2 minutes

Keywords

integrated circuit testing; integrated circuits; multiwire proportional chambers; muon detection; 0.6 mV; 72 ps; DIALOG chip full characterization; DIALOG integrated circuit; DIALOG output channels programmable time delay; DIALOG test system; DIALOG threshold voltage outputs; circuit functionalities; multiwire proportional chambers; muon chambers; semiautomatic test system; Circuit testing; Delay effects; Detectors; Frequency; Integrated circuit measurements; Integrated circuit testing; Mesons; Semiconductor device measurement; System testing; Variable speed drives;

fLanguage

English

Publisher

ieee

Conference_Titel

Nuclear Science Symposium Conference Record, 2005 IEEE

Conference_Location

Fajardo

ISSN

1095-7863

Print_ISBN

0-7803-9221-3

Type

conf

DOI

10.1109/NSSMIC.2005.1596347

Filename

1596347