PACE3: a large dynamic range analog memory front-end ASIC assembly for the charge readout of silicon sensors

Author

Aspell, P. ; Barney, D. ; Bialas, W. ; Bloch, P. ; Dupanloup, M. ; Go, A. ; Kloukinas, K. ; Manthos, N. ; Moraes, D. ; Morrissey, Q. ; Peisert, A. ; Reynaud, S. ; Sidiropoulos, G. ; Tcheremoukhin, A. ; Vichoudis, P.

Author_Institution

CERN, Geneva, Switzerland

Volume

2

fYear

2005

fDate

23-29 Oct. 2005

Firstpage

904

Lastpage

908

Abstract

This paper describes the architecture of PACE3 and the key design parameters for a large dynamic range front-end amplification and low noise analog memory. Measured results from PACE3 are presented characterizing the chip´s performance in terms of gain, pulse shaping characteristics, noise, power consumption and radiation tolerance with respect to total ionizing dose and robustness to single event upsets (SEU).

Keywords

analogue storage; application specific integrated circuits; noise; nuclear electronics; readout electronics; silicon radiation detectors; PACE3; charge readout; large dynamic range analog memory front-end ASIC assembly; large dynamic range front-end amplification; low noise analog memory; noise; power consumption; pulse shaping characteristics; radiation tolerance; silicon sensors; single event upsets; total ionizing dose; Analog memory; Application specific integrated circuits; Assembly; Dynamic range; Gain measurement; Noise shaping; Power measurement; Sensor phenomena and characterization; Silicon; Single event upset;

fLanguage

English

Publisher

ieee

Conference_Titel

Nuclear Science Symposium Conference Record, 2005 IEEE

ISSN

1095-7863

Print_ISBN

0-7803-9221-3

Type

conf

DOI

10.1109/NSSMIC.2005.1596401

Filename

1596401