DocumentCode
451916
Title
MSTC: A Method for Identifying Overconstraints during Hierarchical Compaction
Author
Bamji, Cyrus S. ; Varadarajan, Ravi
Author_Institution
Cadence Design Systems, San Jose, CA
fYear
1993
fDate
14-18 June 1993
Firstpage
389
Lastpage
394
Abstract
Hierarchical compaction requires that a system of linear equations be solved, usually via linear programming (LP) techniques. In the presence of overconstraints, LP techniques provide inadequate information to locate the cause of these overconstraints. A new graph theoretical method capable of identifying overconstraints and providing meaningful feedback to the user is described. The method also considerably reduces the number of equations to be solved by LP, making compaction of very large layouts possible.
Keywords
Circuits; Compaction; Equations; Feedback; Law; Layout; Legal factors; Linear programming; Permission; Rivers;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1993. 30th Conference on
ISSN
0738-100X
Print_ISBN
0-89791-577-1
Type
conf
DOI
10.1109/DAC.1993.203980
Filename
1600253
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