• DocumentCode
    452096
  • Title

    ProperHITEC: A Portable, Parallel, Object-Oriented Approach to Sequential Test Generation

  • Author

    Parkes, Steven ; Banerjee, Prithviraj ; Patel, Janak

  • Author_Institution
    Center for Reliable and High-Performance Computing, University of Illinois, Urbana, IL
  • fYear
    1994
  • fDate
    6-10 June 1994
  • Firstpage
    717
  • Lastpage
    721
  • Abstract
    Automatic test pattern generation (ATPG) for sequential circuits remains one of the most compute-intensive tasks in the integrated circuit design process. Although numerous attempts have been made to speed the ATPG process via parallelization, these attempts have often proved disappointing when compared against the best available serial algorithms using metrics of resultant quality and performance. In this paper we introduce ProperHITEC, a parallel extension of the HITEC/PROOFS sequential test generation package. ProperHITEC embodies a new approach to parallel ATPG; it is incrementally derived from one of the best-performing serial algorithms and this incremental derivation is implemented via the mechanisms of object-oriented programming. Results of running ProperHITEC on three parallel architectures, the Sun 4/600MP, the INTEL iPSC/860, and the Encore Multimax are presented. These results show that ProperHITEC achieves results virtually identical in quality to HITEC while achieving significant multiprocessor utilization.
  • Keywords
    Automatic test pattern generation; Concurrent computing; Electrical capacitance tomography; Fault detection; Integrated circuit synthesis; Parallel processing; Sequential analysis; Sequential circuits; Test pattern generators; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation, 1994. 31st Conference on
  • ISSN
    0738-100X
  • Print_ISBN
    0-89791-653-0
  • Type

    conf

  • DOI
    10.1109/DAC.1994.204194
  • Filename
    1600467