• DocumentCode
    454497
  • Title

    Disjunctive Image Computation for Embedded Software Verification

  • Author

    Wang, Chao ; Yang, Zijiang ; Ivancic, Franjo ; Gupta, Aarti

  • Author_Institution
    NEC Labs. America, Princeton, NJ
  • Volume
    1
  • fYear
    2006
  • fDate
    6-10 March 2006
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Finite state models generated from software programs have unique characteristics that are not exploited by existing model checking algorithms. In this paper, we propose a novel disjunctive image computation algorithm and other simplifications based on these characteristics. Our algorithm divides an image computation into a disjunctive set of easier ones that can be performed in isolation. Hypergraph partitioning is used to minimize the number of live variables in each disjunctive component. We use the live variables to simplify transition relations and reachable state subsets. Our experiments on a set of real-world C programs show that the new algorithm achieves orders-of-magnitude performance improvement over the best known conjunctive image computation algorithm
  • Keywords
    embedded systems; finite state machines; graph theory; performance evaluation; program verification; C programs; disjunctive image computation; embedded software verification; finite state models; hypergraph partitioning; Application software; Chaos; Character generation; Embedded computing; Embedded software; Hardware; Laboratories; National electric code; Partitioning algorithms; Software algorithms;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe, 2006. DATE '06. Proceedings
  • Conference_Location
    Munich
  • Print_ISBN
    3-9810801-1-4
  • Type

    conf

  • DOI
    10.1109/DATE.2006.244049
  • Filename
    1657077