DocumentCode
472769
Title
A New CMOS SRAM Cell with Fully Planarizing Technology
Author
Narita, Yoshitaka ; Ohya, Shuichi ; Kikuchi, Masanori
Author_Institution
1st LSI Division, NEC Corporation 1120, Shimokuzawa, Sagamihara, Kanagawa 229, Japan
fYear
1987
fDate
22-23 May 1987
Firstpage
103
Lastpage
104
Keywords
CMOS technology; Etching; Filling; Flip-flops; Large scale integration; National electric code; Planarization; Random access memory; Resists; Surface morphology;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 1987. Digest of Technical Papers. Symposium on
Conference_Location
Karuizawa, Japan
Type
conf
Filename
4480443
Link To Document