DocumentCode
492663
Title
Design trend of energy-efficient CAMs
Author
Wang, Jinn-Shyan ; Wang, Chao-Ching ; Chen, Tai-An
Author_Institution
Dept. of Electr. Eng., Nat. Chung Cheng Univ., Chiayi
Volume
01
fYear
2008
fDate
24-25 Nov. 2008
Abstract
Several state-of-the-art CAM designs are reviewed and studied in this work. Reviews are given in three aspects, including the match-line design, the search-line design, and application-specific designs. Parts of these CAMs are redesigned based on a 90 nm CMOS technology, and evaluation results when they are operated from a subthreshold VDD to a normal high VDD are reported. These results indicate that a new sub-threshold CAM design is needed in the future if a more energy-efficient CAM is pursued.
Keywords
CMOS digital integrated circuits; content-addressable storage; integrated circuit design; CMOS technology; application-specific designs; content addressable memory; energy-efficient CAM; match-line design; search-line design; CADCAM; CMOS technology; Cams; Chaos; Circuit synthesis; Computer aided manufacturing; Energy consumption; Energy efficiency; Random access memory; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
SoC Design Conference, 2008. ISOCC '08. International
Conference_Location
Busan
Print_ISBN
978-1-4244-2598-3
Electronic_ISBN
978-1-4244-2599-0
Type
conf
DOI
10.1109/SOCDC.2008.4815565
Filename
4815565
Link To Document