DocumentCode
492706
Title
Processor energy estimation method using cycle-approximate simulator
Author
Byun, Woo-Hong ; Kang, Kyungsu ; Kyung, Chong-Min
Author_Institution
Dept. of EECS, Korea Adv. Inst. of Sci. & Technol., Daejeon
Volume
01
fYear
2008
fDate
24-25 Nov. 2008
Abstract
In existing methods for processor energy estimation, the information on the internal state of processor architecture, i.e., (de)activation of specific modules such as pipeline stages and the cache, is available via a cycle-accurate simulator. Despite good accuracy, above methods are too slow due to the complexity of cycle-accurate simulation. This paper describes a new technique for estimating the energy consumption of processors by predicting the internal information of processor architecture through a cycle-approximate simulator. We have evaluated our approach in comparison with an existing energy estimation method using a cycle-accurate ARM v5 architecture simulator. Experimental results shows that the proposed method achieves 97% accuracy and 28 times speed-up on average.
Keywords
cache storage; parameter estimation; pipeline processing; power consumption; ARM v5 architecture simulator; cycle-approximate simulator; processor energy estimation; Analytical models; Computational modeling; Computer architecture; Computer simulation; Energy consumption; Personal digital assistants; Pipelines; Predictive models; State estimation; Yield estimation; cycle-approximate simulator; processor energy estimation; software energy estimation;
fLanguage
English
Publisher
ieee
Conference_Titel
SoC Design Conference, 2008. ISOCC '08. International
Conference_Location
Busan
Print_ISBN
978-1-4244-2598-3
Electronic_ISBN
978-1-4244-2599-0
Type
conf
DOI
10.1109/SOCDC.2008.4815629
Filename
4815629
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