Low power multistandard simultaneous reception architecture

Author

Burciu, Ioan ; Verdier, Jacques ; Villemaud, Guillaume

Author_Institution

INRIA, Univ. of Lyon, Lyon, France

fYear

2009

fDate

28-29 Sept. 2009

Firstpage

65

Lastpage

68

Abstract

In this paper, we address the architecture of multistandard simultaneous reception receivers and we aim at improving both the complexity and the power consumption of the analog front-end. To this end we propose an architecture using the double orthogonal translation technique in order to multiplex two received signals. A study case concerning the simultaneous reception of 802.11 g and UMTS signals is developed in this article.

Keywords

3G mobile communication; communication complexity; multiplexing; radio receivers; wireless LAN; 802.11 g signal; UMTS signal; analog front-end power consumption; double orthogonal translation technique; low power multistandard simultaneous reception architecture; multistandard simultaneous reception receivers; 3G mobile communication; Baseband; Chemical technology; Energy consumption; Frequency; Gain control; Image reconstruction; Signal processing; Standards development; Transceivers; complexity; double orthogonal frequency translation; multistandard simultaneous reception; power consumption;

fLanguage

English

Publisher

ieee

Conference_Titel

Wireless Technology Conference, 2009. EuWIT 2009. European

Conference_Location

Rome

Print_ISBN

978-1-4244-4721-3

Type

conf

Filename

5291035