Dynamic reconfigurable storage and pretreatment system of SAR signal processing using Nios II architecture

Because of synthetic aperture radar (SAR) is a powerful remote sensing technique, there has been growing interest in using SAR to obtain high resolution image. Modern high- performance SAR requires advanced and sophisticated signal processing technique to get high-quality image products. Meanwhile, the semiconductor technologies are updated day after day, programmability and flexibility are the trend of current electronic system, and it leads to the advent of system-on-chip (SOC). The Nios II, a soft-core processor integrated in Altera FPGA chip, is characterized by its flexibility and programmability. In this paper, a dynamic reconfigurable storage and pretreatment system of SAR signal processing is designed and realized based on the Nios II soft-core processor. The proposed architecture takes advantage of the embedded CPU to control all the peripherals, highly increased the efficiency of the design.