Adaptive router architecture based on traffic behavior observability

A Network-on-Chip with large FIFO size ensures performance during the execution of different traffic flow, but unfortunately, these same buffers are the main responsible for the router total power dissipation. Another aspect is that by sizing buffers to reach higher throughput incurs in extra dissipation for the mean case, which is much more frequent. In this paper we propose the use of an adaptive router with a mechanism that, using a flow sensor, verifies during run time the behavior of the data traffic. From the observability of the data flow, the system uses a control equation that adapts itself to provide an appropriate buffer depth for each channel to sustain performance with minimum power dissipation. As applications show different traffic behavior at run-time, this solution allows one to obtain gains in throughput and latency under rather different communication loads, since the buffers slots are dynamically allocated to increase router efficiency in the NoC. With the proposed architecture the latency was 75% lower and throughput was increased 4.6 times to Xbox application, for the same buffer depth. Moreover, the adaptive router allows up to 28% power savings, while maintain the same performance of the equivalent homogeneous router.