DocumentCode
510011
Title
Breaking adaptive multicast deadlock by virtual channel address/data FIFO decoupling
Author
Keung, Ka-Ming ; Tyagi, Akhilesh
Author_Institution
Comput. Archit. Lab., Iowa State Univ., Ames, IA, USA
fYear
2009
fDate
12-12 Dec. 2009
Firstpage
11
Lastpage
16
Abstract
As computing goes to system-on-chip era, on-chip network becomes an essential infrastructure for on-chip modules (cores) communication. 2D-Mesh is the most common on-chip network topology providing high throughput point-to-point communication due to its simplicity and regularity. A well-designed 2D-Mesh wormhole router should be deadlock free while supporting multicast and adaptive routing. Unfortunately, there exists no router design providing all these characteristics concurrently. In this paper, we propose an on-chip address-data decoupled FIFO wormhole router which supports adaptive routing, native multicast and deadlock free network guarantee. For a network using a 30-flit packet, our wormhole router increases the area efficiency by 49.5% compared with a virtual cut-through router.
Keywords
integrated circuit design; logic design; network-on-chip; system-on-chip; 2D-mesh wormhole router; 30-flit packet; adaptive multicast deadlock; adaptive routing; multicast routing; on-chip modules communication; on-chip network topology; point-to-point communication; system-on-chip; virtual channel address/data FIFO decoupling; virtual cut-through router; Buffer storage; Delay; Distributed computing; Mesh networks; Network topology; Network-on-a-chip; Packet switching; Routing; System recovery; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Network on Chip Architectures, 2009. NoCArc 2009. 2nd International Workshop on
Conference_Location
New York, NY
Print_ISBN
978-1-60558-774-5
Type
conf
Filename
5375721
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