• DocumentCode
    511734
  • Title

    Analysis of SMT decoupling capacitor placement in electronic packages using hybrid modeling method

  • Author

    Oo, Zaw Zaw ; Liu, En-Xiao ; Wei, Xingchang ; Zhang, Yaojiang ; Li, Er-Ping

  • Author_Institution
    Dept. of Comput. Electron. & Photonics, A*STAR, Singapore, Singapore
  • fYear
    2009
  • fDate
    14-16 Dec. 2009
  • Firstpage
    627
  • Lastpage
    630
  • Abstract
    An efficient hybrid modeling method is presented for analysis of the surface-mount technology (SMT) decoupling capacitor placement in the power distribution network (PDN) of an electronic package. The PDN includes the multilayered power-ground (P-G) planes, the P-G vias, and the decoupling capacitors to provide a low-impedance path between the printed circuit board and the die. The SMT decoupling capacitors are commonly used to mitigate the resonant phenomenon of the electronic package in cavity-like structure and provide the additional return paths for the signal traces. Applying the modal decomposition of the waves propagating inside the P-G planes and the traces, the electro-magnetic fields can be decomposed into the parallel-plate mode and the transmission-line mode. The former is analyzed by using the scattering matrix method for the finite P-G planes with multiple vias. The multiconductor transmission-line theory is applied to model the micro-striplines and striplines in the package. The method has been experimentally validated.
  • Keywords
    S-matrix theory; capacitors; multiconductor transmission lines; surface mount technology; SMT decoupling capacitor placement analysis; cavity like structure; electromagnetic fields; electronic packages; hybrid modeling method; low impedance path; microstriplines; modal decomposition; multiconductor transmission line theory; multilayered power-ground planes; parallel plate mode; power distribution network; printed circuit board; scattering matrix method; surface-mount technology; transmission line mode; waves propagation; Capacitors; Electronics packaging; Matrix decomposition; Power systems; Printed circuits; Resonance; Scattering; Surface-mount technology; Transmission line matrix methods; Transmission lines; decoupling capacitor placement; high-speed digital design; power distribution network; power integrity;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Integrated Circuits, ISIC '09. Proceedings of the 2009 12th International Symposium on
  • Conference_Location
    Singapore
  • Print_ISBN
    978-9-8108-2468-6
  • Type

    conf

  • Filename
    5403691