• DocumentCode
    511775
  • Title

    Frequency resolution enhancement for digitally controlled oscillators using series switched varactor

  • Author

    Dai, Xuan ; Zhang, Weicheng ; Jin, Jing ; Zhou, Jianjun

  • Author_Institution
    Sch. of Microelectron., Shanghai Jiao Tong Univ., Shanghai, China
  • fYear
    2009
  • fDate
    14-16 Dec. 2009
  • Firstpage
    397
  • Lastpage
    400
  • Abstract
    A novel way to improve the frequency resolution of digitally-controlled oscillators (DCO) is proposed. A minimum sized MOS capacitor in parallel with a closed transmission gate forms a small fixed capacitor unit. The fine tuning capacitor bank in DCO is then implemented using this unit in series with the switched MOS varactor to achieve better frequency resolution. A DCO in 90 nm CMOS implemented using this new structure achieves a frequency resolution of 1.6 kHz without dithering and a phase noise of -152 dBc/Hz at 20 MHz offset when oscillating at 3.1 GHz. Compared with previously published DCOs in the same process, better frequency resolution and FOM (-187) are achieved.
  • Keywords
    CMOS integrated circuits; MOS capacitors; oscillators; phase noise; semiconductor device noise; varactors; CMOS; MOS capacitor; closed transmission gate; digitally controlled oscillators; fine tuning capacitor bank; fixed capacitor; frequency 3.1 GHz; frequency resolution enhancement; phase noise; series switched varactor; Capacitance; Digital control; Frequency; MOS capacitors; Oscillators; Phase locked loops; Phase noise; Transceivers; Tuning; Varactors; Frequency resolution; MOS varactor; all-digital phase-locked loop (ADPLL); deep-submicron CMOS; digitally controlled oscillator (DCO);
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Integrated Circuits, ISIC '09. Proceedings of the 2009 12th International Symposium on
  • Conference_Location
    Singapore
  • Print_ISBN
    978-9-8108-2468-6
  • Type

    conf

  • Filename
    5403778