• DocumentCode
    511915
  • Title

    A VHDL-AMS modeling methodology for top-down/bottom-up design of RF systems

  • Author

    Maehne, Torsten ; Vachoux, Alain ; Giroud, Frédéric ; Contaldo, Matteo

  • Author_Institution
    Lab. de Syst. Microelectroniques (LSM), Ecole Polytech. Fed. de Lausanne (EPFL), Lausanne, Switzerland
  • fYear
    2009
  • fDate
    22-24 Sept. 2009
  • Firstpage
    1
  • Lastpage
    7
  • Abstract
    This paper presents a modelling methodology for the top-down/bottom-up design of RF systems based on systematic use of VHDL-AMS models. The model interfaces are parameterizable and pin-accurate. The designer can choose to parameterize the models using performance specifications or device parameters back-annotated from the transistor-level implementation. The abstraction level used for the description of the respective analog/digital component behavior has been chosen to a good trade-off between accuracy, fidelity, and simulation performance. These properties make the models suitable for different design tasks such as architectural exploration or overall system validation. This is demonstrated on a model of a binary FSK transmitter parameterized to meet very different target specifications. The achieved flexibility and systematic model documentation facilitate their reuse in other design projects.
  • Keywords
    frequency shift keying; frequency synthesizers; hardware description languages; integrated circuit design; integrated circuit modelling; radiofrequency integrated circuits; transmitters; VHDL-AMS modeling; abstraction level; binary FSK transmitter; bottom-up design; frequency shift keying; frequency synthesizers; hardware description languages; model documentation; top-down design; transistor-level implementation; Digital signal processing; Frequency shift keying; Frequency synthesizers; Mathematical model; Phase locked loops; Pulse amplifiers; Radio frequency; Transceivers; Transmitters; Voltage-controlled oscillators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Specification & Design Languages, 2009. FDL 2009. Forum on
  • Conference_Location
    Sophia Antipolis
  • ISSN
    1636-9874
  • Electronic_ISBN
    1636-9874
  • Type

    conf

  • Filename
    5404056